1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly, to a semiconductor memory device having a plurality of random access memory (RAM) cells each including a lateral bipolar transistor as a load element.
2. Description of Related Art
Bipolar RAM devices have been widely used, for example, in computers of large capacity as the cash memories thereof. Recently, the high integration density and fast switching speed of the bipolar RAM devices have been required for increasing performance of computers. The bipolar RAM devices are mainly employed as 16 to 64 Kilo bit (Kb) memory devices, and the devices of high integration density are favorable in which a PNP bipolar transistor is employed as the load element of the memory cell in view of electric power consumption, rather than using an SBD.
The memory cell using a conventional lateral PNP bipolar transistor as the load element has a fast reading speed. However, its writing speed is slow. A writing speed of a memory cell using a lateral bipolar transistor as the load element depends mainly on its cut-off frequency f.sub.T and its characteristic of current amplification factor .beta. when its emitter is grounded. Concerning the cut-off frequency, an operation of about one tenth to several nano seconds can be obtained by a base width of about several microns which is determined by photolithography process steps, although the base width of the lateral PNP transistor is inferior by about two figures to that of a vertical PNP transistor having a width of one tenth of a micron. Therefore, the cut-off frequency can sufficiently respond to a necessary writing speed of several nano seconds. On the other hand, concerning the current amplification factor .beta. when its emitter is grounded, the value .beta. must be large, for example, more than 7, at a small amount of current range in the holding operation of the memory cell for obtaining a strong immunity against .alpha. radiations or noises. In contrast, the value .beta. must be small, for example, less than 0.2 at a large amount of current range in the writing operation of the memory cell for obtaining a fast reversing speed. However, in a prior art, the current amplification factor .beta. of a PNP lateral transistor formed as the load element is gradually decreased from its small current range to its large current range with a gentle slope. Therefore, the value .beta. cannot be sufficiently small in the writing operation. Consequently, a conventional memory cell has a defect in that the writing speed is inevitably slow.